SC417/SC427
27
Applications Information (continued)
The component values used in this circuit are calculated
using the following procedure.
Select C
L
(100nF) and R
L
to provide a 25mV ripple across
C
L
(V
CL
).
CL
OUT
IN
L
I
V
V
R
where
ON
CL
L
CL
T
V
C
I
and
SW
IN
OUT
ON
f
V
V
T
Next choose a value for C
C
so that
E
ON
C
R
T
C
where
2
1
2
1
EQ
R
R
R
R
R
The resistor values (R
1
and R
2
) in the voltage divider circuit
set the V
OUT
for the switcher.
Choosing Input Capacitors
Input capacitors bank is used to provide AC current to the
power stage when the high side FET turns on and espe-
cially during the output current step up. The ripple current
rating of the input capacitors must meet or exceed I
RMS
ripple caused by the switching currents. The ripple current
generated is calculated using the following equation.
IN
OUT
IN
OUT
OUT
RMS
V
)
V
V
(
V
I
I
A
83
.
2
12V
)
V
1.05
V
12
(
V
1.05
A
10
I
RMS
Because of their low ESR and ESL, ceramic capacitors are
typically used. High quality dielectric capacitors should
be used (for example X5R or X7R). The effective capaci-
tance of ceramic capacitors varies under DC bias and tem-
perature. Another factor of selecting the input capacitors
is its voltage rating which needs to be higher than the
maximum input voltage because the ringing on the LX
node. While a single capacitor is sufficient to handle the
ripple current, additional ceramic capacitors or bulk
capacitors may be needed to provide local energy storage
and a low impedance input source to account for any PCB
or input connector impedances.
Dropout Performance
The output voltage adjust range for continuous-conduc-
tion operation is limited by the fixed 250ns (typical)
minimum off-time of the one-shot. When working with
low input voltages, the duty-factor limit must be calcu-
lated using worst-case values for on and off times.
The duty-factor limitation is shown by the next equation.
)
MAX
(
OFF
)
MIN
(
ON
)
MIN
(
ON
T
T
T
DUTY
The inductor resistance and MOSFET on-state voltage
drops must be included when performing worst-case
dropout duty-factor calculations.
System DC Accuracy (V
OUT
Controller)
Three factors affect V
OUT
accuracy: the trip point of the FB
error comparator, the ripple voltage variation with line
and load, and the external resistor tolerance. The error
comparator offset is trimmed so that under static condi-
tions it trips when the feedback pin is 500mV, 1%.
The on-time pulse from the SC417/SC427 in the design
example is calculated to give a pseudo-fixed frequency of
250kHz. Some frequency variation with line and load is
expected. This variation changes the output ripple
voltage. Because constant on-time converters regulate to
the valley of the output ripple, ?of the output ripple
appears as a DC regulation error. For example, if the
output ripple is 50mV with V
IN
= 6 volts, then the measured
DC output will be 25mV above the comparator trip point.
If the ripple increases to 80mV with V
IN
= 25V, then the
measured DC output will be 40mV above the comparator
trip. The best way to minimize this effect is to minimize
the output ripple.
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